· Development of architecture to fulfil system requirements · Creation of design and test requirements · RTL design and verification · Production of high quality Documentation. · Work across a multidisciplinary team to ensure successful product integration · Adhere to design guides and coding standards · Adhere to configuration standards · Deliver on time and budget |
Outline of Competencies: |
· A strong team player · Good analytical and problem-solving skills · Strong written and oral skills · Impart knowledge and best practice · (See also the competencies implied by the experience section below)
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Qualifications and Experience required: |
Essential: · Degree qualified in Electronic Engineering or similar relevant engineering discipline. · A minimum of 5 years' experience in RTL Design and Verification (preferably VHDL) in either a product-development or IP-development role. · A minimum of 3+ years' experience of ideally either Xilinx Vivado/ISE or intel (Altera) Quartus Prime; or alternatively ASIC design team experience. · Experience of Timing constraints creation, analysis and closure both FPGA on-chip and inter-device. · Experience of configuration management in a team environment (Git, svn, etc.)
Highly Desirable: · Scripting experience (eg. tcl, python, bash etc.) · Signal Processing/DSP experience · Defining sub-system architecture |
